A protection circuit protects an electronic circuit from damages caused by ESD and impedance mismatches (i.e., power amplifier ruggedness). The electronic circuit is protected from such damage by diverting the currents from excessive applied voltages/electric fields to an alternative path provided by the ESD protection circuit. ESD protection circuitry is described in my U.S. patent application Ser. No. 13/545,214 filed Jul. 10, 2012; the disclosure of which is hereby incorporated by reference.
The protection circuit is connected between nodes of the electronic circuit being protected. Different configurations of the protection circuit are required for compatibility with the variety of different circuit nodes (such as DC versus RF, input versus output, low versus high voltage, etc) and the variety of different types and/or magnitudes of ESD or overstress events which the differing nodes require protection from.
The cost of integrated circuits is usually proportional to the size of the integrated circuit die, and it is therefore desirable to find techniques to reduce the area added by the protection circuit. It is also highly desirable that the protection circuit not add any substantial cost or size to the integrated circuit containing the protection circuits or to the development process owing to re-designing, re-fabrication, and re-characterization of the different configurations.